Chinese chip maker Innosilicon has announced it has provided its domestic customers with its new LPDDR6/5X memory controller IP.
Innosilicon's new LPDDR6/5X PHY + IP Controller combo has been designed using an advanced FinFET process technology, allowing for low-power operation, high bandwidth, and low latency in a multi-packaged controller with multiple other core advantages.
Popular Now: Xbox users can use last-gen Xbox One consoles to verify Xbox Series discs for disc-to-digital conversionThe company says that its expertise with other DRAM technologies including GDDR6, GDDR6X, GDDR7, HBM3E, and even HBM4, allowed Innosilicon to develop a robust LPDDR6/5X solution for the mass market.
In order to hit the high-speed capabilities of its new LPDDR6/5X combo IP controller, Innosilicon used a custom IO architecture design along with process optimizations for SIPI simulation. These tricks provided a 1.5x increase over their previous LPDDR5X solution, which capped out at 9.6Gbps, compared to 14.4Gbps with its new LPDDR6/5X memory controller.
LPDDR6 also shifts over from a 16-bit architecture to a 24-bit architecture, moving the IO rate from 9.6Gbps to 14.4Gbps, as well as expanding the IO bit size from 8-bit to 12-bit, providing a single-channel 24-bit architecture with a 2x bandwidth increase.
LPDDR6-Specific Features:
- I/O speed up to 14.4Gbps
- ECS (auto/manual) and Link ECC support
- System Meta Function Mode
- Dual/Per/All Bank Refresh (single/burst)
- Read-Modify-Write with Mask Write support
- Dynamic write NT-ODT
- DVFSL mode
- x24/x48 burst modes
- Normal and dynamic/static efficiency modes
LPDDR6/5X Common Features:
- Flexible data width expansion: x12 to x48 (LPDDR6), x16 to x32 (LPDDR5X)
- Built-in performance monitor
- Tx pre-emphasis and Rx DFE to improve signal integrity
- LPDDR5X WCK mode and Link ECC support
- PoP and discrete memory package support
- Single Rank and Multi-Rank configurations
- PVT compensation and timing calibration for all corner reliability
- At-speed BIST, Scan Insertion, PAD and Internal Loopback support
- Multiple low-power modes, including Idle auto-gating, SDRAM self-refresh/power-down, and power-down retention
- Low jitter with superior noise rejection
- Configurable via APB/AHB/AXI register interfaces
Innosilicon says that its new LPDDR6/5X memory controller IP is on track for mass production, and that we should expect to see the first products using its new memory controller later this year from several partners.
