One of the most amazing things that human civilization has created is the silicon chip, with semiconductor technology not just about the 'CPU' or the 'GPU' anymore... but rather advanced packaging technology is absolutely bleeding-edge, and now there's an awesome way to visualize just how amazing it is. Check this out:
ASE showed off a rather awesome model in Taiwan recently, which demonstrates the various components of advanced packaging, and how it is bound together through CoWoS (Chip On Wafer On Silicon). The center piece is the XPU or GPU logic die (this does the calculations) while surrounding that chip are multiple layers of HBM (High Bandwidth Memory) which is made by SK hynix, Samsung, and Micron.
All of this delicious semiconductor tech is packaged together with microbumps onto the copper colored RDL, while underneath the silver-colored component is the silicon interposer. After that, everything is placed onto the substrate itself, which the likes of TSMC and Samsung working towards "radically new" semiconductor packaging technology called panel-level packaging, you can read more about that in the links below:
- Read more: Samsung reportedly ahead of TSMC with next-gen panel-level packaging semiconductor tech
- Read more: TSMC exploring 'radically new' semiconductor packaging technique called panel-level packaging
In a breakdown of the 2.5D aka CoWoS advanced packaging technique, Clark Tang explains that the complex process of advanced packaging is done to create a combined chip that is able to access different capabilities at a very fast rate. Most people think that it's just the GPU doing the work -- but the HBM memory is just as, if not more important than an ultra-fast AI chip -- just like super-fast GDDR6, GDDR6X, and upcoming GDDR7X is to consumer graphics cards. The faster, the wider bus, the better for high-res, high FPS gaming.
HBM3 is the leading memory for AI GPUs right now, with HBM3E debuting inside of NVIDIA's beefed-up Hopper H200 AI GPU, and its new Blackwell AI GPUs. HBM4 and HBM4E will debut in 2025 and 2026, with NVIDIA's next-gen Rubin R100 AI GPU.
AI workloads froth over high memory bandwidth, with constraints on the system occurring when how fast the XPU can read and write the AI calculations to memory.
- Read more: TSMC, Micron, ASE to convert old display plants into CoWoS advanced packaging plants
- Read more: TSMC seeks land for new CoWoS advanced packaging plant, struggles with AI demand
- Read more: TSMC to raise 3nm costs by 5%, new CoWoS advanced packaging 10-20% in 2025
- Read more: TSMC buying equipment for two CoWoS advanced packaging plants to be built in Taiwan
- Read more: TSMC expand CoWoS equipment orders: AI demand from NVIDIA, Amazon, Meta, Tesla
- Read more: NVIDIA's next-gen R100 AI GPU: TSMC 3nm with CoWoS-L packaging, HBM4 in Q4 2025
- Read more: TSMC expands advanced packaging capacity at 3 plants: CoWoS, SoIC, SoW for AI GPUs
- Read more: NVIDIA, AMD reserve all of TSMC's CoWoS and SoIC advanced packaging for 2024 and 2025
- Read more: NVIDIA's new Blackwell AI GPUs drives TSMC to increase CoWoS output by over 150% in 2024
- Read more: TSMC to build new CoWoS advanced packaging facility in Japan, only place outside Taiwan