Intel Panther Lake-H, Panther Lake-U CPU details: up to 16 cores, Xe3 'Celestial' GPU, 5 Tiles

Intel's next-gen Panther Lake CPU configurations have been leaked, where we can expect up to 5 Tiles on Panther Lake CPUs in the future.

In a new post on X by leaker "Jaykihn" the next-gen Panther Lake-H and Panther Lake-U processors have been detailed, with Intel confirming it has hit the "Power On" achievement on Panther Lake CPUs, entering production on Intel's in-house 18A process node in the first half of 2025, with availability sometime in 2H 2025.

The leak includes a blueprint of the Intel Panther Lake-H processor and details for three configurations. Panther Lake CPUs will be hitting laptops in thin and light designs, right up to high-end laptops of the future.

The higher-end Panther Lake CPUs will arrive as the Panther Lake-H chips, while the entry-level chips are codenamed Panther Lake-U. These chips will replace Arrow Lake-H and Arrow Lake-U processors, which will be launching in early 2025.

• Read more: Intel CEO: next-gen Panther Lake CPUs have 2x AI performance over Arrow Lake
• Read more: Intel Panther Lake CPU: 2025-2026 'top to bottom leadership in all sectors'

Intel's upcoming Panther Lake-H processors will arrive in two configurations: the first with 4 P-Cores based on the Cougar Cove architecture, with 8 E-Cores based on the Darkmont architecture, as well as 4 additional LP-E cores. The differences between the two configurations will come down to the integrated GPU, with 12 x Xe3 "Celestial" GPU cores, with Panther Lake-H processors seeing a PL1 TDP of 25W, and PL2 TDP of 45W.

The entry-level "thin-and-light" Panther Lake-U processors will feature just 4 P-Cores and 4 LP-E Cores for a total of 8 cores, with the integrated GPU featuring 4 x Xe3 "Celestial" GPU cores. We're expecting a TDP of 15W for PL1, and 28-30W for PL2 power ratings.

We also get some details on the blueprint of Panther Lake-H, with a total of 5 Tiles but just 3 of the Tiles will be active. "Die 4" is the Compute Tile, "Die 1" is the Platform Controller Die (PCD), while "Die 5" is the Xe3 "Celestial" GPU Tile. "Die 2" and "Die 3" are passive, placed there to allow Intel hit the rectangular shape for the chip itself.

• Die 4 (Compute Tile) - 8.004 x 14.288 = 114.3mm
• Die 1 (Platform Tile) - 12.408 x 3.953 = 49.048mm
• Die 5 (Graphics Tile) - 8.097 x 6.76 = 54.73mm
• Die 2 (Passive Tile) - 6.112 x 3.592 = 24.154mm
• Die 3 (Passive Tile) - 3.952 x 2.489 = 9.83mm
• Total Size = 12.591 x 21.782 = 274.2mm