TSMC's next-gen COUPE tech: silicon photonics packaging will be ready in 2026

TSMC has announced its development of next-generation Compact Universal Photonic Engine (COUPE) technology, which will support the "explosive growth" in data transmission associated with the "AI boom."

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Taiwan Semiconductor Manufacturing Company (TSMC) unveiled its newest semiconductor process, advanced packaging, and 3D IC technologies for the next-generation of AI innovations with silicon leadership at TSMC's 2024 North America Technology Symposium.

At the event, TSMC unveiled its new A16 technology, which packs industry-leading nanosheet transistors with an innovative backside power rail solution for production in 2026, with "greatly improved logic density and performance." TSMC also introduced its new System-on-Wafer (TSMC-SoW) technology, which is an innovative solution that delivers "revolutionary performance to the wafer level" in addressing the future AI requirements for hyperscaler datacenterrs.

The next-gen COUPE technology uses SoIC-X chip stacking technology to stack an electrical die on top of a photonic die, which TSMC says will offer the lowest impedance at the die-to-die interface and higher energy efficiency than conventional stacking methods.

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TSMC says its has plans to qualify COUPE for small form factor pluggables in 2025, which will be followed by integration into CoWoS packaging as co-packaged optics (CPO) in 2026, bringing optical connections directly into the package.

TSMC explained in its press release: "TSMC is developing Compact Universal Photonic Engine (COUPE™ ) technology to support the explosive growth in data transmission that comes with the AI boom. COUPE uses SoIC-X chip stacking technology to stack an electrical die on top of a photonic die, offering the lowest impedance at the die-to-die interface and higher energy efficiency than conventional stacking methods. TSMC plans to qualify COUPE for small form factor pluggables in 2025, followed by integration into CoWoS packaging as co-packaged optics (CPO) in 2026, bringing optical connections directly into the package".

TSMC has also teased that it's working on a new technology that would supply power to chips from the backside of the chips themselves, speeding up AI chips and other processors in 2026 and beyond. Intel has a similar technology that will be one of its main advantages over its competitors, and TSMC is gearing up to deliver a competitor with backside power delivery.