SK Hynix research fellow Kim Dong-Kyun has said that the DDR5 memory standard could hit the P{C next year, where it will kick things off at a huge DDR5-5200 offering twice the bandwidth of DDR4-2666.
Last year SK Hynix developed a working prototype of a 16-gigabit (2GB) DDR5 DRAM chip that reached 5200 MT/s with just 1.1V. Kim explained: "We are discussing several concepts of the post DDR5. One concept is to maintain the current trend of speeding up the data transmission, and another is to combine the DRAM technology with system-on-chip process technologies, such as CPU".
The company is working on its own innovations that will continue to make DDR5 dazzle, developing technologies that will hopefully beat its competition which is also making DDR5 memory. Kim teased: "We have developed a multi-phase synchronization technology that enables keeping the voltage during a high-speed operation in a chip at a low level by placing multiple phases within the IP circuit, so the power used on each phase is low but the speed is high when combined".
Kim also said that the DDR6 memory standard is also in development, with memory makers aiming for twice the bandwidth and densities of DDR5 which will already offer significant improvements over DDR4.