Sony's next-generation PlayStation 6 console will be radically faster and more technologically equipped than its predecessor, with leaks suggesting the GPU power inside of the PS6 will be around Radeon RX 9070 XT performance.

In a new post on the NeoGAF forums, leaker Kepler_L2 has predictions of RX 9070 XT performance for the PS6, and that the next-gen Xbox will have performance close to NVIDIA's GeForce RTX 5080 graphics card. AMD's new RDNA 5 GPU is being split into two dies: AT0 and AT2, with the next-gen consoles presumably having AT2 dies for their next-gen RDNA 5 portions of the APU.
AMD's upcoming AT2 die was leaked by Moore's Law is Dead, with the RDNA 5 family split into four different parts with the AT0 die used for the flagship RDNA 5 GPU and the purported Radeon RX 10900 XT (placeholder name) that would sport an incredible 154 CUs of RDNA 5 performance.
Under that is the AT2 die which is split into three parts: 64 CUs, 48 CUs, and 44 CUs each with varying TDP, cache, VRAM capacity (all RDNA 5 cards are on GDDR7) and performance. MLID says that we could expect 40-48 CUs of RDNA 5 CUs at 3.0GHz+ which would, according to his own leaked chart on AT0 + AT2, lines up with the estimated equivalent performance on the chart of between RX 9070 and the RTX 4080 SUPER.
Kepler_L2 and MLID's leaks are close with performance estimates are, but most outlets have been referencing MLID's chart with the AT0 and AT2 die configuration leaks.
One big key difference is that Kepler_L2 provides the receipts in terms of patents that AMD holds, which feed into the fact that RDNA 5 will deliver far more exciting tweaks and changes coming in the future. We'll see those benefits not just on the RDNA 5-based Radeon RX series GPUs for the PC, but also next-gen PS6 and Xbox consoles, too.
Here's a list of the AMD patents that Kepler_L2 posted about:
Dense Geometry Format (basically HW level Nanite):
- WO2025085121 DENSE GEOMETRY FORMAT
- WO2025085120 INTERSECTION TESTING ON DENSE GEOMETRY DATA USING TRIANGLE PREFILTERING
Streaming Wave Coalescer (out-of-order execution):
- US20250068429 STREAMING WAVE COALESCER CIRCUIT
- US20250130811 Spill-After Programming Model for the Streaming Wave Coalescer
Workgroup self-launch (reduced CPU and GPU-frontend bottlenecks):
Many improvements to RT cores (beyond current uarchs):
- US20250182377 CONFIGURABLE RAY/EDGE TESTING FOR CONVEX POLYGON GROUPS
- US20250200890 PRISM VOLUMES FOR DISPLACED SUBDIVIDED TRIANGLES
- US20250200865 RAY TRACING OF DISPLACED MICRO MESHES USING A BOUNDING PRISM HIERARCHY
- WO2025144454 SYSTEMS AND METHODS FOR DETECTING RAY INTERSECTIONS WITH DISPLACED MICRO-MESHES




