We've already had a decent look at the patent for AMD's upcoming GPU chiplet technology, but a new patent that was published on April 1 teases a few very interesting new things.
AMD's new GPU chiplet technology patent has an inter-chiplet bridge that has its own integrated cache, which is the main course here versus the previous tease of AMD's upcoming GPU chiplet tech. The active bridge would be a high-bandwidth die-to-die interconnect between the GPU chiplet dies, depending on how many there are.
The active bridge chiplet would handle inter-chiplet communications and route cross-chiplet synchronization signals, where the LLC here means L3 cache -- AKA the new Infinity Cache found inside of the new RDNA 2-based Radeon RX 6000 series graphics cards.
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AMD says that any inter-chiplet communication will be routed through the active bridge chiplet, where on the individual GPU chipets it will need to access memory channels. The entire active bridge cache also acts like a gigantic GPU cache, where the memory can be addressed as a single large amount of cache versus chiplet-specific changes that software developers would otherwise be forced to make.
Interesting and very exciting developments here.
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