AMD has semi-confirmed the existence of low-power, low-performance "LP" cores in Zen 6, through a new Linux kernel patch. AMD engineer Vishal Badole recently submitted a patch series that extends the Linux x86 topology code to recognize a "Low Power" core class, separate from the Performance and Efficiency types Linux already tracks.
The core type appears in CPUID (Fn0x80000026, EBX bits 31:28), where a value of 2 flags a core designed for minimal power draw during background and idle work. Boost scaling for these cores would follow the same method AMD already uses for its Efficiency cores.
The patch itself never mentions Zen 6, Medusa, or a specific chip. It's plumbing work, the kind AMD tends to push into the kernel well before hardware ships. However, it lines up almost exactly with what leakers have been saying about the PS6 Portable's "Canis" APU for months. There are rumors about 4 Zen 6c cores paired with 2 Zen 6 LP cores, with the LP pair reportedly handling the PlayStation OS, so the rest of the chip can dedicate more headroom to games.
The PS6 Portable itself is still shaping up mostly through leaker reports rather than anything official from Sony. Earlier leaks put the handheld's "Canis" APU on a 3nm process with around 24GB of LPDDR5X memory, aimed at running PS6 games natively rather than on a separate, scaled-down library. If the LP cores really are earmarked for OS duties, that would track with what handheld makers have been chasing for a while now: more battery life without gutting game performance.
Sony's rumored home console APU, "Orion," has also popped up in leaks with a similar 2x LP core allocation alongside a larger Zen 6c cluster. On the mobile side, AMD's upcoming Medusa Point laptop chips are said to include 2 Zen 6 LP cores with a modest 512KB of L2 and 2MB of L3, which would make this a three-tier setup spanning full Zen 6, Zen 6c, and now Zen 6 LP.
The Intel comparison is hard to avoid here. Intel already ships low-power background cores on Meteor Lake and Lunar Lake for the same reason, keeping idle and light tasks off the main core cluster to save battery. AMD's version reportedly keeps the same x86 instruction set across all three core types, unlike Intel's mix of P-core, E-core, and LP E-core designs, which could make scheduling a little less messy for Windows and Linux alike.
Story Q&A
Powered by TweakBot
From TweakTown's coverage of this story.
How will Linux and Windows schedulers distinguish and prioritize tasks for Zen 6 LP cores vs Zen 6c and full Zen 6 cores based on the new CPUID flag?
Could devices using Zen 6 LP cores (like the rumored PS6 Portable or Medusa Point laptops) expect noticeably better battery life compared with current Zen 6c-only designs, given the LP cores handle background/OS tasks?
Will software that relies on core-count reporting or affinity masks need updates to recognize the new CPUID low-power core class to avoid scheduling heavy workloads onto LP cores?
Want something else? Ask TweakBot.
None of this is confirmed by AMD outside the kernel code, so treat the PS6 Portable pairing as still unofficial. If it holds up, it would mark AMD's first real move into a three-tier core hierarchy, something that could eventually trickle down to Medusa Point laptop chips and beyond as AMD chases better battery life on thin-and-light hardware.
