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AMD X399 TR4 Threadripper Motherboard Buyer's Guide (Page 1)

AMD X399 TR4 Threadripper Motherboard Buyer's Guide

Our AMD X399 TR4 Threadripper motherboard buyer's guide will guide you through the various options to consider when picking a product.

By Steven Bassiri on Sep 19, 2017 10:55 am CDT

Introduction and Basics


AMD's Threadripper CPUs landed a little over a month ago, and with them came X399 motherboards. The X399 chipset acts as a south bridge for the CPU and expands upon the CPU's integrated features. Most X399 motherboards, if not all of them, are extremely high-end and they are loaded with a ton of features. Quality, feature implementation, and unique features are what set apart X399 motherboards, and we will take a look at what's on the market as of today.

I wrote a guide like this for the X370 platform, and people seemed to enjoy it, so I decided to do one for the X399 platform. The guide you are about to dive into will act almost like a trail map for our motherboard reviews. While our reviews dive deep into many aspects of the motherboard, this article will help you navigate them more easily.


I want to start out by talking about what the platform has to offer, and we will focus first on the X399 chipset itself. The X399 chipset integrates two USB 3.1 (10Gbps/USB 3.1 gen 2) ports, six USB 3.0 (5Gbps/USB 3.1 gen 1) ports, six USB 2.0 ports, eight PCI-E 2.0 lanes, eight SATA 6Gb/s ports, and it technically also has two PCI-E 3.0 lanes. If we look at the footnote on the platform, we see that the two PCI-E 3.0 ports can be configured as four SATA6Gb/s ports (for the four extra that would make 12 AMD says the platform supports) or two SATA Express ports. However, no vendor has used them so far as to my knowledge. There does seem to be a total limit on the number of ports, and just like Intel's HSIO documentation, there is a lot of "up to" language used in the official specifications.


The next part of the system's IO comes from the CPU itself. Instead of M.2 coming mainly out of the chipset (like Intel does), AMD's TR4 CPUs offer 64 PCI-E lanes and those are used for M.2 and PCI-E lanes. Four of the 64 PCI-E 3.0 lanes go to the chipset, and that leaves 60 lanes for a total of up to 7 devices. The seven device limit is for CPU connected devices, and it can be overcome with a clock generator on extra devices or the port. Most motherboard vendors have chosen to implement the 60 lanes in a configuration with three x4 M.2 ports and then four PCI-E lanes that split the remaining 48 lanes as x16/x8/x16/x8. In fact, I believe every vendor has implemented the CPU's ports as such, but there are many other configurations.

The motherboard vendors could implement the lanes for six PCI-E x8 slots and one x4 M.2 slot or as four x4 M.2 slots and three PCI-E x16 slots, but so far we haven't seen that. One thing to notice here is that every Threadripper CPU offers the same lanes and features, which is awesome because then it's easier to understand what configurations are possible. The CPU also provides eight USB 3.0 ports, Azalia HD audio, and system management (such as the SPI bus for the BIOS).


Here we see two different block diagrams of two separate X399 motherboards, and we can see how they route bandwidth from the chipset. The board on the left uses quite simple mechanics, connections are direct, and if we count lanes the board on the left uses six PCI-E 2.0 lanes to provide two PCI-E x1 slots, WIFI, wired LAN, and an extra USB 3.1 controller. Keep in mind the board on the left has eight SATA 6Gb/s ports, but the board on the right has only six.

The board on the right only has six, because if we count the lanes used, it actually uses up more than the eight PCI-E 2.0 lanes AMD has specified, and instead requires 10 PCI-E 2.0 lanes from the chipset. It does this by taking two SATA6Gb/s ports and using them as PCI-E 2.0 for an extra USB 3.1 controller. There are also boards that use up all eight of their PCI-E 2.0 lanes and offer eight SATA6Gb/s ports. Perhaps because connectivity is so busy already they don't want to intrude on signal integrity of the CPU, or to simply differentiate their product line up.

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Steven Bassiri

ABOUT THE AUTHOR - Steven Bassiri

Steven went from a fledgling forum reader in 2003 to one of the internet's brightest stars by 2010. Armed with an information systems degree, a deep understanding of circuitry, and a passion for tech, Steven (handle Sin0822) enjoys sharing his deep knowledge with others. Steven details products down to the component level to highlight seldom explained, and often misunderstood architectures. Steven is also a highly decorated overclocker with several world records under his belt. He brings that knowledge and experience to TweakTown.

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