SK hynix developing 3D DRAM it calls 4F2 DRAM: joins South Korean competitor Samsung's 3D DRAM

SK hynix has just announced it's planning to develop a 4F2 (square) DRAM, joining South Korean rival Samsung and its journey into the world of 3D DRAM.

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The cost of EUV (extreme lithography) processes has continued to skyrocket since the commercialization of 1c DRAM, with SK hynix researcher Seo Jae Wook noted during an industry conference in Seoul, South Korea, on Monday.

The Elec reports that Seo said at the time whether manufacturing DRAM this way (using EUV) was profitable, where in response, SK hynix said it was considering manufacturing vertical gate (VG) or 3D DRAM for future DRAM. VG is what SK hynix internally calls 4F2, while Samsung calls theirs vertical channel transistor (VCT).

SK hynix's new adventures into 4F2 is a much-researched cell array structure where the transistors are stacked vertically, which is also called 3D DRAM. Everything is stacked vertically: the source, gate, drain, and capactitor are vertically stacked, while the word line is connected to the gate, and the bit lien is connected to the source.

Having the cell array this way is capable of reducing the die surface area by 30% compared to 6F2 DRAM, with sources telling The Elec that Samsung and SK hynix are aiming to use 4F2 with DRAM in the 10nm node and under. SK hynix's Seo said that with VG or 3D DRAM, the process can be designed to reduce the cost of EUV processes by half, which is a huge deal.