Samsung shows off next-gen 3D DRAM tech, should hit the market after 2030

Samsung has just unveiled its next-generation 3D DRAM technology for next-generation memory solutions, with a single-chip capacity of over 100GB, a massive leap over current limitations in DRAM technology.

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Samsung made the announcement at the recent Memcon 2024 conference. With DRAM line widths expected to fall below 10nm in the coming years, current memory architectures are getting close to their scaling limits. This is where 3D DRAM will come into play, boosting memory capacity and reducing its footprint.

Samsung talked about two different key technologies for 3D DRAM: Vertical Channel Transistors and Stacked DRAM. Starting with Vertical Channel Transistors (VCT), which will be a fundamental change in transistor design, where the current flow channel is changed from horizontal to vertical, Samsung aims to massively reduce the transistor's footprint. VCT requires much higher precision during the etching process, so there are caveats.

Stacked DRAM is the second technology that Samsung talked about. Unlike traditional 2D DRAM, which only uses the horizontal plane, stacked DRAM will use the vertical dimension (z-axis) to stack multiple layers of memory cells on a single chip. Single-chip capacities could skyrocket to upwards of 100GB or more, which would be a game changer when the time comes.

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The 3D DRAM market is estimated to be worth over $100 billion by 2028, so if Samsung continues to forge ahead and become a leader in 3D DRAM, it can better fight South Korean rival SK hynix which is tearing up the HBM business. SK hynix reportedly holds 90%+ of the HBM memory market share and has plans to invest $90 billion in the "world's largest mega fab complex" in South Korea over the next two decades.