Linux 7.2 makes TSC support mandatory for x86 CPUs, but it's not like Windows 11's TPM 2.0 check

The latest Linux kernel has made the Time Stamp Counter (TSC) a hard requirement for x86 processors, ending decades of compatibility code that allowed the operating system to run on hardware without reliable TSC support. The change, committed to Linux 7.2 under the title "x86/cpu: Make CONFIG_X86_TSC unconditional," removes the configuration logic that previously allowed the kernel to be built without TSC support.

Before you panic, this is not Linux's equivalent of Windows 11's TPM 2.0 requirement. The TSC has been present in x86 processors since the Intel Pentium launched in 1993. If your CPU was made within the last three decades, it almost certainly has one. The change is really about finally removing compatibility code for hardware that is unlikely to be running a modern Linux kernel anyway.

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The TSC itself is a 64-bit register that provides high-resolution timing and can be read far more quickly than platform alternatives such as HPET or the ACPI PM timer. Reading a TSC-based timer can take tens to hundreds of CPU cycles, while falling back to a motherboard-based timer can take roughly 0.8 to 1.0 microseconds.

Linux has historically maintained code to handle processors that lacked a reliable TSC, going all the way back to the i486 era. Linux 7.0 dropped support for Intel 486 processors, and subsequent development cycles removed additional legacy hardware that had prevented TSC from being treated as universal.

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Which x86 CPUs are affected by Linux 7.2 making TSC support mandatory?

Linux 7.2 requires x86 CPUs to have a Time Stamp Counter, so only very old processors that lack a TSC are affected. The article notes the TSC has been present since the Intel Pentium launched in 1993, and Linux previously maintained fallback code back to the i486 era, so pre-Pentium or i486-era hardware would be impacted.

If my processor is from the 1990s or newer, can I expect Linux 7.2 to run without timing issues?

Yes. The article says the TSC has been present in x86 processors since the Intel Pentium launched in 1993, and if your CPU was made within the last three decades it almost certainly has one. Linux 7.2 makes TSC support mandatory, so modern 1990s-or-newer CPUs should not have timing issues related to missing TSC support.

How does TSC-based timing compare to HPET or the ACPI PM timer in latency?

Reading the TSC is far faster: a TSC-based timer read takes on the order of tens to hundreds of CPU cycles. By contrast, falling back to a motherboard-based timer such as HPET or the ACPI PM timer takes roughly 0.8 to 1.0 microseconds.

Why did the Linux kernel keep legacy timing code for processors without a reliable TSC until now?

Linux kept the legacy timing code to support very old x86 hardware that lacked a reliable Time Stamp Counter, dating back to the i486 era. Over decades the kernel maintained fallback logic for systems without a dependable TSC, and only now, because virtually all CPUs made in the last thirty years include a TSC and such legacy hardware is unlikely to run modern kernels, has that compatibility code been removed.

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Microsoft went down this road much earlier, using the TSC as the basis for its QueryPerformanceCounter API since Windows 8, although it still maintains fallback logic for edge cases and virtualization environments. Linux has now effectively caught up, cleaning out another piece of legacy timing code that has been hanging around for decades.