Samsung's next-gen 1c DRAM test yields for its HBM4 rumored at 65%, delayed until 2026

One of the key parts in Samsung returning to competitiveness in the HBM market lies with its new 1c DRAM, which will be an integral part of its next-gen HBM4 memory ready to fight SK hynix and Micron in the AI battle of 2026 with HBM4.

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In a new report from TheElec picked up by insider @Jukanrosleve on X, we're hearing that Samsung has delayed its 12-stack HBM4 memory based on its new 1c DRAM until 2026. Samsung had originally aimed for mass production in the second half of this year, but it is being more cautious with its HBM4 rollout, setting a new target for Production Readiness Approval (PRA) in Q4 2025.

Samsung redesigned its 1c DRAM process, with performance improvements and yields that have reportedly reached 65%, with a source familiar with the matter adding: "the company has internally set the goal for HBM4 12-stack PRA in Q4. This means mass production is now targeting next year, not this year. Based on small-scale sample tests conducted at the R&D fab, the 1c DRAM yield recorded 65%, which is a hopeful situation.

The new 65% yields are from recent 1c DRAM sample production tests that Samsung planned for this month, while mass production yields will change over time, so it's expected that Samsung will aim for a higher sample product yield before entering mass production. Samsung is expected to deliver mass production of its new HBM4 memory samples to key customers in the next few months.

Samsung Electronics emphasized during its recent Q1 2025 earnings conference call: "For HBM4, we are developing it with the goal of mass production in the second half, as planned, to align with customer project schedules".

Even with this delay, the industry sees this as a positive move for Samsung's next-gen HBM4 memory, with the positive direction in which its 1c DRAM redesign process in two ways. One of those involved newly developing 1c through similar designs of 1a and 1b, while the other involved redesigning both 1c and 1b to implement a completely new 1c.

The latter approach is the method that reportedly won, with Samsung attempting both simultaneously, with analysis suggesting the by redesigning 1a and 1c, the chip size of the new 1c DRAM was increased, leading to yield improvements. Meanwhile, the increased scope of redesigning naturally led to increased costs.

Another industry source commented: "the mere act of redesigning both 1c and 1b incurred enormous costs, and the number of chips that can be produced also decreased, leading to reduced margins".

One of the main challenges for Samsung is whether it can maintain the yield achievements of its new 1c DRAM that it has seen during its sample test during mass production. Samsung still needs to perform additional tests to apply the newly developed 1c DRAM to the mass production stage.

TheElec's source continued: "interpreting PRA passage as securing victory is an overstatement. Yield issues arise when moving into the mass production stage, it will still take time to stably secure yield alongside increasing HBM4 production".