Intel and AMD have partnered to introduce new improvements to the x86 instruction set, with the two competing companies coming together in a joint initiative to strengthen the future of x86 computing.

The joint initiative was formed in October 2024, and today marks a one-year anniversary, with Intel and AMD outlining a bunch of new standardizing features for x86. The goal of the initiative is to enhance compatibility, predictability, and consistency across x86 processor-based productions, which includes everything from supercomputers to handheld gaming devices.
The advisory group has outlined key technical milestones to include as features in upcoming x86 processors, which have been outlined below. One of the announced features is FRED, or Flexible Return and Event Delivery, which AMD and Intel intend to reduce latencies and increase software reliability with a "modern interrupt model." Additionally, AVX10 is the next-generation vector and general-purpose instruction set extension, designed to boost throughput and enable portability across client, workstation, and server CPUs.
- Read more: Intel on next-gen Nova Lake CPUs: new LGA1954 socket, up to 52 cores, Xe3 GPU on Intel 18A
The other features are listed below.
Standardizing x86 Features
- FRED (Flexible Return and Event Delivery): Finalized as a standard feature, FRED introduces a modernized interrupt model designed to reduce latency and improve system software reliability.
- AVX10: Established as the next-generation vector and general-purpose instruction set extension, AVX10 boosts throughput while ensuring portability across client, workstation, and server CPUs.
- ChkTag: x86 Memory Tagging: To combat longstanding memory safety vulnerabilities such as buffer overflows and use-after-free errors, the EAG introduced ChkTag, a unified memory tagging specification. ChkTag adds hardware instructions to detect violations, helping secure applications, operating systems, hypervisors, and firmware. With compiler and tooling support, developers gain fine-grained control without compromising performance. Notably, ChkTag-enabled software remains compatible with processors lacking hardware support, simplifying deployment and complementing existing security features like shadow stack and confidential computing. The full ChkTag specification is expected later this year - and for further feature details, please visit the ChkTag Blog.
- ACE (Advanced Matrix Extensions for Matrix Multiplication): Accepted and implemented across the stack, ACE standardizes matrix multiplication capabilities, enabling seamless developer experiences across devices ranging from laptops to data center servers.




