Fujitsu's new 144-core Monaka chip: Arm, 2nm + 5nm chiplets, 3D-stacked CPU cores over memory

Fujitsu has just shown off a sample of its new Monaka processor: a new Armv9-based 144-core chip that is destined for data centers of the future.

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Last week, the Japanese company announced it was working with Broadcom to use its new 3.5D eXtreme Dimension System in Package (3.5D XDSiP) platform, and now we're being introduced to Fujitsu's new Monaka processor.

The new Monaka chip is a large CoWoS system-in-package (SiP) that has 4 x 36-core compute chiplets, made on TSMC's N2 process node with 144 Armv9-based cores with enhancements that are stacked on top of SRAM tiles, in a face-to-face (F2F) layout, using hybrid copper bonding (HCB).

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Fujitsu is using the SRAM tiles (essentially huge caches) are made on TSMC's N5 process node, with the compute and cache stacks loaded with a huge I/O die that features an integrated memory controller, PCIe 6.0 lanes with CXL 3.0 on top to connect accelerators and extenders. Monaka uses mainstream DDR5 memory which should fall into MR-DIMM or MCR-DIMM form, which will provide huge capacities and lower costs for data centers.

Fujitsu's new Arm-based Monaka processor family will compete with AMD's fleet of EPYC processors, and Intel's family of Xeon chips. We should expect to see advantages (and disadvantages) with Monaka, but once place it'll shine is the energy efficiency, as Fujitsu says that it has goals of doubling efficiency compared to its competitors by 2026-2027, while using air cooling.

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We should expect to see Fujitsu's new Monaka processors powering data centers in the fiscal year of 2027, which kicks off on April 1, 2026, and ends on March 31, 2027... so we've got a while to wait yet.