Micron M500DC Internals
The M500DC comes in a 2.5-inch form factor with a 7mm z-height and is available in the microserver friendly 1.8-inch form factor.
The large thermal pad sheds heat from the controller into the case, and two Micron DRAM chips total 1GB of capacity. The PCB appears barren with only eight 20nm MLC NAND packages in total. The 480GB model has 768GB of RAW capacity, giving it a 60 percent spare area. The only deviation in spare area comes with the 800GB model at 28 percent. This leads to lower random write specifications for the 800 GB capacity point and the same endurance as the 480GB model. Micron uses a 1:11 parity scheme that consumes part of the spare area, and the remainder is dedicated to overprovisioning.
Power capacitors line the bottom of the PCB, and the Marvell 9187 controller manages the drive. Micron has extensive experience with Marvel controllers and utilizes their own firmware with XPERT functionality.
eXtended Performance and Enhanced Reliability Technology (XPERT)
XPERT (eXtended Performance and Enhanced Reliability Technology) provides enhanced defect and error management technology through four integral components.
RAIN (Redundant Array of Independent NAND) calculates and stores parity. This RAID 5-like implementation operates at the device level, storing a 1:11 parity ratio for the 120, 240, and 480GB capacities, and 1:15 ratio for the 800GB drive. This facilitates data recovery in the event of an error or failure. RAIN provides extra data security in addition to the standard ECC approach, and it recovers lost data beyond page, block, and die-level failures. This transparent process takes place without any performance degradation, but it comes at the expense of capacity. RAIN relies upon extra NAND to store the data, but Micron compensates with extra spare area.
DataSAFE ensures data integrity during transfer through the drive interface, DRAM, error checkers, data concatenations, and the retirement of NAND. This is accomplished through CRC and ECC algorithms before and after each element in the data path.
ARM/OR (Adaptive Read Management/Optimized Read) dynamically tunes the NAND with DSP algorithms over the life of the device.
ReCal (Reduced Command Access Latency) utilizes a combination of latency reduction and wear leveling efficiency techniques to deliver consistent performance.
Micron M500DC Specifications
Endurance is rated at 0.5PB for the 120GB drive, 1.0PB for the 240GB drive, and 1.9PB for the 480GB and 800GB models.
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- Page 1 [Introduction]
- Page 2 [Micron M500DC Internals and Specifications]
- Page 3 [Test System and Methodology]
- Page 4 [Benchmarks - 4k Random Read/Write]
- Page 5 [Benchmarks - 8k Random Read/Write]
- Page 6 [Benchmarks - 128k Sequential Read/Write]
- Page 7 [Benchmarks - Database/OLTP and Web Server]
- Page 8 [Benchmarks - Email Server]
- Page 9 [Final Thoughts]
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