AMD Ryzen 9050 'Strix Halo' APU leak: 16 Zen5 CPU cores, RDNA 3.5 GPU, 32MB of MALL cache

AMD's next-gen Ryzen 9050 series "Strix Halo" APU specs have been circulating the rumor mill for a while now, but some new details have surfaced that are getting us excited.

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The new Strix Halo APU will be quite the beast, offering 16 cores and 32 threads of next-gen Zen 5 processing power, with 1MB of L2 cache per core, and 32MB per CCD of unified L3 cache (MALL cache). We should see not one but two CCDs on the Strix Halo APU, which will see 8MB of L2 cache per CCD (8 cores per CCD, two CCDs = 16 cores = 16MB of L2 cache in total).

AMD's next-gen Strix Halo APU will feature an upgraded XDNA2-based NPU for AI workloads, offering a much higher 60 TOPS of AI workload performance. Remember: this is 60 TOPS just for the NPU, and not counting what will be capable from the CPU and GPU on Strix Halo. Speaking of the GPU, AMD will include an RDNA 3.5-based GPU with 20 Work Group Processors (WGP).

Strix Halo will also have high-end DisplayPort 2.1 UHBR10 and UHBR20, ready for the world of super-high-end displays, powered by your next-gen APU. We have support for 256-bit LPDDR5X-8000 memory on Strix Halo, with a 70W TDP by default, but it'll scale up to 130W of power at the top end.

Strix Point on the other hand, will drop the core count down to 12C/24T of Zen 5 processing power, and the GPU down to 8 WGPs -- but still based on the upgraded RDNA 3.5 GPU architecture. Strix Point will support LPDDR5X-7500 by the looks of things, but this could change closer to its release.

AMD should reveal its next-gen Zen 5 architecture and new Ryzen 9000 series CPUs at Computex 2024, which kicks off on June 5.