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Haswell's USB3.0 bug will require a chipset revision to fix

Haswell USB 3.0 bug will require a chipset revision to fix
| CPU, APU & Chipsets News | Posted: Mar 11, 2013 11:07 pm

Intel has a bit of a problem on its hands. It's probably not as terrible as the Sandy Bridge SATA controller issue, but it could end up being another costly fix for the chip giant. According to Fudzilla, the problem cannot be fixed by a mere software update. Rather, the chipset will require a new revision to take care of the issue.




The bug isn't too major. If a USB 3.0 port is being used when the system is put to sleep (S3 state), the device will need to be reconnected upon waking the machine. It's nothing more than a slight hassle, but this is the second chipset glitch experienced by Intel in less than a year.


Motherboard vendors are saying that June is still the planned introduction for Haswell, so it looks like the first batch of motherboards could possibly be coming with the buggy chipset. We'll know more as the proposed launch period nears.


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