PCIe 3.0 Makes Its Entrance
It isn't surprising that LSI is the first to market with the new PCIe 3.0 HBAs, as they did lead the charge for 6Gb/s implementation into the server space. This has served to cement LSI as the current enterprise RAID technology leader with a 75% market share in the channel and four out of the five largest OEMs as their customers. LSI has fired the starting gun for PCIe 3.0 connectivity with this new line of HBA products, which will expand to the PCIe 3.0 MegaRAID controllers in Q3 of this year.
The previous generation of LSI hardware was effectively limited to around 2.9GB/s due to the restrictions of PCIe 2.0. The chart above illustrates the impressive bandwidth increases that will be unlocked with the inclusion of PCIe 3.0 technology. A 47% increase in bandwidth is certainly a large jump as we move to the newer interface, but bear in mind this is just with 6Gb/s SAS that is already heavily implemented.
There will be a further jump in speed as LSI transitions to 12GB/s SAS, leaping up above 6 GB/s in bandwidth later in the year. 12Gb/s SAS would be rather pointless on a PCIe 2.0 interface, even the current 6Gb/s specification hasn't been used to its full potential until now.
Just as important as the higher bandwidth is the ability to utilize that throughput effectively. There are limitations to the amount of the overall bandwidth that actually translates to usable performance for the end-user. There is an overhead that is required for the protocol itself to operate. Keeping this overhead low is of importance and LSI has managed to keep the overhead steady at 20%. This efficiency allows the user to reap the most of the available specifications' bandwidth.
The PCIe 3.0 interface delivers a bit rate of eight gigatransfers per second (GT/s), close to twice the bandwidth of PCIe 2.0. There are also technological advances in the specification itself, with transmitter and receiver equalization, PLL improvements and clock data recovery. These new products are aimed at corporate datacenters, cloud storage providers and high performance computing. Providing more performance in a smaller package will allow end users to more efficiently and effectively scale the storage subsystem as their needs grow.
Combining the PCIe 3.0 interface with new architecture that is onboard server motherboards brings the PCIe lanes directly to the Intel Xeon E3 and E5 series chips. This will provide even better performance for future applications, with no Northbridge to incur additional latency.
Last updated: Apr 7, 2020 at 12:31 pm CDT
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- Page 1 [Introduction]
- Page 2 [PCIe 3.0 Makes Its Entrance]
- Page 3 [Specifications, Pricing and Availability]
- Page 4 [Test System and Methodology]
- Page 5 [Latency and 4K Random]
- Page 6 [Sequential Read Speed]
- Page 7 [512B Random Read Testing]
- Page 8 [Thermal Monitoring and Watts to IOPS]
- Page 9 [Final Thoughts]