JEDEC to Standardise Hybrid Memory Modules

JEDEC to Standardise Hybrid Memory Modules



JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced that its JC-45 Committee for DRAM Modules intends to form a new Subcommittee focused on the standardisation of hybrid memory modules. To be chaired by PNY Technologies, Inc. and Cypress Semiconductor, the JC-45.6 Hybrid Modules Subcommittee will hold its first meeting in Munich, Germany on February 28, 2011.

Hybrid memory modules are comprised of different types of memory technologies and leverage some of the beneficial characteristics of each, operating as a system instead of as individual components. "I am optimistic about the potential benefits of hybrid modules," said Chris Socci, Chairman of the new JC-45.6 Subcommittee. "For example, modules with a DRAM interface that also incorporate the non-volatile characteristics of NAND flash could provide new options for data security in a variety of storage and backup systems in the event of power loss. This new family of modules has the potential to help entire segments of the market 'go green' by reducing the need for batteries, and may one day extend to all applications that demand memory."

John Kelly, JEDEC President, added, "The new hybrid modules activity in JC-45 is part of an ongoing effort within JEDEC to extend memory technologies to meet the industry's need for innovative solutions that will meet future demands. I am pleased to welcome all interested companies to participate in the development of open industry standards within JEDEC to help enable and grow the market for these types of modules."

Last updated: Apr 7, 2020 at 12:03 pm CDT