ASML rumored to have rented office space in Kaohsiung, Taiwan to support TSMC's new 2nm plant

ASML is rumored to have signed a contract to lease a commercial office in North Kaohsiung, Taiwan, and has officially entered Kaohsiung, to help the installation of TSMC's new 2nm plant in Kaohsiung.

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ASML is the world's largest wafer lithography equipment manufacturer, with TSMC being the world's largest contract chip manufacturer, the two powers combined make for a force to be reckoned with... mostly against Samsung and Intel. ASML has four offices spread out in Taiwan right now, located in Hsinchu, Linkou, Taichung, and Tainan.

Linkou has a smart manufacturing center that is responsible for machine refurbishment and measurement equipment protection, while Tainan has an E-beam electron beam inspection equipment manufacturing center, and an EUV Global Training Center.

TSMC's second 2nm fabrication plant in Kaohsiung is in the basement excavation process, with mass production expected to begin in the first half of 2026, another two years away. TSMC has invested around $20 billion for its new 2nm fab.

• Read more: TSMC might not use ASML's latest High-NA EUV machines for its future-gen A16 process in 2026
• Read more: Intel places orders to secure ALL of ASML's High-NA EUV machines built this year
• Read more: TSMC doesn't need ASML's new High-NA EUV lithography machines for its next-gen A16 process
• Read more: TSMC executives outline how they'll get to a monster 1 trillion transistor GPU

Intel came out banging its chest in February this year, saying that with its new High-NA EUV lithography machines from ASML, the company would make the world's fastest chips in the coming years with its new Intel 14A process node. TSMC's senior vice president of business development, Kevin Zhang, told reporters that TSMC has developed its new A16 process node quicker than expected, thanks to the insatiable demand from AI chip companies like NVIDIA.

Zhang said that AI companies "really want to optimize their designs to get every ounce of performance we have". The TSMC executive continued, saying that TSMC doesn't need ASML's new High-NA EUV lithography machines to build next-gen A16-based chips.

Intel secured its first High-NA EUV lithography machine at a cost of $373 million, and is currently in the process of getting it tooled up and prepared for production later this year, and really fired up and cranking out chips in 2025 and beyond.

• Read more: Intel finishes assembly of ASML's first High-NA EUV tool, ready for 2025
• Read more: ASML ships its second High-NA EUV lithography machine to a mystery client
• Read more: US demands ASML stop servicing its machines already sold to Chinese customers
• Read more: Dutch government to spend $2.7 billion on keeping ASML in the Netherlands
• Read more: Dutch government kicks off 'Operation Beethoven' to stop ASML from moving
• Read more: China president: we don't need ASML, 'no force can stop the pace of China'

TSMC has also teased that it's working on a new technology that would supply power to chips from the backside of the chips themselves, speeding up AI chips and other processors in 2026 and beyond. Intel has a similar technology that will be one of its main advantages over its competitors, and TSMC is gearing up to deliver a competitor with backside power delivery.

• Read more: Intel's new video shows ASML's bleeding-edge $380M High-NA machine installed
• Read more: Intel and ASML achieve 'First Light' milestone with new High-NA lithography tech
• Read more: ASML ships industry's first High-NA EUV lithography scanner to Intel
• Read more: Intel unveils its new Intel 14A process node, ready for the future of AI chips
• Read more: TSMC: next-gen 1nm-class monolithic chips with 1 trillion transistors by 2030
• Read more: TSMC preparing for 1nm production, new cutting-edge facility in Taiwan
• Read more: Intel: 2026 when it wants to beat TSMC at making the world's fastest chips
• Read more: Intel targets 1 trillion transistors on a single package by 2030
• Read more: Intel CEO: we want 1 trillion transistors in a single package by 2030