Intel's new 3D Foveros packaging tech: LEGO-like chiplets for CPUs

Intel has revealed more details on its upcoming 3D Foveros packaging technology, which it will be using to built its next-gen Meteor Lake, Arrow Lake, and Lunar Lake CPUs of the future.

The company discussed more details on its packaging technology during Hot Chips 34, where we're finding out about all the new exciting GPU technology from the likes of AMD, NVIDIA, Chinese GPU maker Birentech, and more. Intel talked about the work it has been putting into the development of its 14th Gen Core "Meteor Lake" CPUs, with its new 3D Foveros packaging technology.

Intel's new Foveros packaging technology is a next-gen inter-die chiplet packaging technology that Intel will be splitting into 3 different ways: The standard design for high-yield, high-volume production, Foveros Omni that mixes and matches tiles in the base die complex, with up to 4x interconnect bump density, and finally there's Foveros Direct that has 16x interconnect density, with lower latency, higher bandwidth, and lower power/die requirements.

Here are the base specs for Intel's new Foveros offerings:

• Foveros: 50-25um (Bump Pitch), >400-1600/mm2 (Bump Density), 0.156 pJ/bit (Power)
• Foveros Omni: 25um (Bump Pitch), 1600/mm2 (Bump Density), <0.15 pJ/bit (Power)
• Foveros Direct: <10 Microns (Bump Pitch), >10,000/mm2 (Bump Density), <0.05 pJ/bit (Power)

Intel has already made considerable changes with its 12th Gen Core "Alder Lake" and upcoming 13th Gen Core "Raptor Lake" CPUs with its hybrid core architecture, but the new 3D Foveros packaging technology will bring Intel up to where AMD is right now: multi-chiplet designs.

The upcoming Intel 14th Gen Core "Meteor Lake", 15th Gen Core "Arrow Lake", and 16th Gen Core "Lunar Lake" CPUs will be infused with the next-gen 3D Foveros packaging technology.

Starting with the 14th Gen Core "Meteor Lake" CPUs, we'll see Intel using a scalable architecture that will have a CPU Tile, SoC Tile, GPU Tile, and I/O Tile that are all attached to a Base Tile. This allows Intel to be flexible with each core architecture, core count, and process.

The same flexibility is given with the amount of GPU cores that Intel adds to the GPU Tile, I/O modularity, process node flexibility, the ability to scale graphics and compute while lower power to discrete graphics performance is another benefit of Intel's use of a scalable architecture.

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We do get some more details on the first outing of Intel's new 3D Foveros packaging technology, with the company going into the construction of its upcoming 14th Gen Core "Meteor Lake" CPUs at Hot Chips 34 this week.

Intel detailed the Meteor Lake CPU die using 3D Foveros packaging technology, where the top layer of the chip has back-side metallization. Under that, we have the GPU Tile, SoC Tile, and CPU Tile that are sitting on the Base Tile with large capacitance, 36um pitch (die-to-die) inter-connect, with metal layers for I/O power delivery, and die-to-die routing.

Intel will be using the scalable architecture across multiple generations, where it all starts with Intel 14th Gen Core "Meteor Lake", and feeds right into 15th Gen Core "Arrow Lake", and 16th Gen Core "Lunar Lake". Intel will using its Intel 4 process on Meteor Lake, Intel 20A on Arrow Lake, and Intel Next for Lunar Lake and beyond... and we all can't wait.