Remember the fully integrated voltage regulator (FIVR) introduced with Haswell CPUs? Turns out that news of Intel axing the technology was not completely true. Intel's previous FIVR was implemented to reduce motherboard voltage regulator (VR, VRM, or MBVR) complexity, as it fed the CPU a single voltage and the CPU then internally branched off, reduced, and controlled the other voltages needed for other CPU domains (graphics, system agent, cache, IO, etc.).
Traditionally, CPU voltage regulators are fed 12v from your main system power supply, and then they reduce it down to voltages below 2v for the CPU and its different domains. However, as CPUs became more complex they required multiple separate VRs, each with their own controllers (PWM Controller). Adding more external VRs not only increases motherboard costs because of the need for each VR to be individually controlled, but also more importantly, it takes up motherboard real estate which is scarce on a motherboard with eight memory DIMMs surrounding the CPU. Over the past week, Intel quietly made public volume 1 of the Skylake-X datasheet, and you can find it here: Intel Skylake-X Datasheet Volume 1 of 2.
In table 1-1 on page 14 we find that "IVR" will be referenced in the datasheet, and it stands for "Integrated Voltage Regulation (IVR): The processor supports several integrated voltage regulators." Later in the datasheet we find reference to the fact that the IVR is related to the previous FIVR through a signal name called "FIVR_Fault", which "Indicates an internal error has occurred with the integrated voltage regulator. The FIVR_FAULT signal can be sampled any time after 1.5 ms..." We then learn further down about the VCCIN signal, "1.8 V - 1.55 V input to the Integrated Voltage Regulator (IVR) for the processor cores, lowest level caches (LLC), ring interface, PLL, IO, and home agent. It is provided by a VR 13.0 compliant motherboard voltage regulator (MBVR) for each CPU socket.
The output voltage of this MBVR is controlled by the processor, using the serial voltage ID (SVID) bus." That is almost identical to the Haswell/Broadwell's FIVR's input voltage range. The difference here is that the IVR doesn't supply all CPU domains. As per the datasheet, there will be other external VRMs so we can't call it an FIVR, but rather just an IVR. We had heard rumors that Skylake had some sort of integrated voltage regulator, but it was nothing like the one in Skylake-X parts, since Skylake CPUs were fed a normal CPU voltage in the range we know is typical for VCore (VID around 1.3v at stock).
Speculation was that Skylake's IVR was linear while the FIVR in Haswell/Broadwell was switching. We do know that Ryzen uses multiple linear regulators, and it seems that Intel is back to the integrated voltage regulator, but the datasheet does not say if it is a linear regulator or a switching regulator. So what can we take away from this? I take away that Intel's Skylake-X is not just Skylake with more cores, it has not only been optimized for higher core counts but it also has a lot of surprises in store for us. As our previous X299 article discussed cache hierarchy changes, but there was no mention of power regulation changes, so we could expect a lot more from Skylake-X than what is currently publicly known.
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