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Intel Launches Cascade Lake CPUs with up to 56 cores

Intel Launches Cascade Lake CPUs with up to 56 cores
Intel takes another swing at AMD with Cascade Lake CPUs with 56 cores.
By: Steven Bassiri | Intel CPUs in CPUs, Chipsets & SoCs | Posted: Apr 2, 2019 5:00 pm

Meet the new 2nd gen Intel Xeon Scalable Processors

 

Cascade Lake is finally here with some improvements over its predecessor, which are highlighted in purple in the image above. The new 9200 series processors offer up to 56 cores and 112 threads, while the 8200 series (opposed to the previous 8100 series) offer processors with up to 28 cores. While cache, interconnector, and PCI-E have stayed the same, there are other improvements.

 

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The first is that each processor supports up to 2933MHz memory, 16Gb DDR4, and Intel's Optane DC Persistent memory with up to 4.5TB system memory per processor. There is also a new instruction enhancement for AI, which we will cover later. There are also many new mitigations for the side-channel attacks and Turbos frequencies have been increased across the stack.

 

intel-launches-cascade-lake-cpus-up-56-cores_02

 

Yup, you see that right, Intel has put two dies into a single package for their 9200 series Xeon Platinum processors, with each of these dual die CPUs supporting duodeco-channel memory (12-channel). UPI is used to connect the dies both on the package and through the PCB in a two-socket system. However, there will be no socket; these dual die CPUs will only be soldered to motherboards and sold that way.

 

intel-launches-cascade-lake-cpus-up-56-cores_03

 

 

Each die has three UPI links operating at 10.4GT/s, so each CPU has a total of four UPI links for each core to connect to each core for single hop latency in a 2S node. If you go with one of the two socket (2S) solutions you will get x80 PCI-E 3.0 lanes. Intel is basically taking their top SKU and putting two on a single package.

 

intel-launches-cascade-lake-cpus-up-56-cores_04

 

It's quite interesting that Intel went the solder root, and it seems like they have reduced the ball count to 5903, considering you might have expected it to be double the balls as there are pins in the LGA 3467 socket. While they were able to get the ball count down they are powering each die separately, so we would expect two sets of VRMs for each CPU. While the power delivery is separate, a single heat spreader is used. The whole point of this move is to increase density in 1U and 2U systems, putting 112 cores into a 1U system is quite impressive.

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