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Intel Skylake Microarchitecture - High Level Info from IDF 2015 (Page 2)

By Steven Bassiri on Aug 24, 2015 08:15 am CDT

Security, Cache, and Memory Improvements


Intel has implemented new security extensions called Intel Software Guard (SGX) and Intel Memory Protection Extensions (MPX). The SGX extension allows for the creation of isolated enclaves which protect against attacks. Debugging is disabled when an enclave is enabled to reduce holes which could make it vulnerable to attacks. Intel's MPX allows for every memory access to be checked to help stop attacks. More specifically, MPX is useful for stopping buffer overflow attacks.


Improvements have also been made to the last level cache (LLC). Both LLC throughput and fabric throughput have been doubled.


As we saw with Broadwell, the CPU had eDRAM onboard that was seen as L4 cache by the system. This changes for Skylake; the eDRAM is now seen as part of system memory instead of L4 cache. For all purposes, the eDRAM is now treated like system memory and software cannot differentiate between the two. However, Intel said that their graphics driver might have the capability to specifically address the eDRAM.


There are some benefits to this eDRAM implementation. There is no longer a need to flush it for coherency maintenance, and it should be available for I/O devices, instead of just mainly graphics.

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Steven Bassiri

ABOUT THE AUTHOR - Steven Bassiri

Steven went from a fledgling forum reader in 2003 to one of the internet's brightest stars by 2010. Armed with an information systems degree, a deep understanding of circuitry, and a passion for tech, Steven (handle Sin0822) enjoys sharing his deep knowledge with others. Steven details products down to the component level to highlight seldom explained, and often misunderstood architectures. Steven is also a highly decorated overclocker with several world records under his belt. He brings that knowledge and experience to TweakTown.

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