Intel DC S3700 Architecture
The consistent performance of the DC S3700 is due to the new Intel controller, the PC29AS21CA (an 8-Channel ASIC), and an optimized firmware designed for low latency operation.
The improved firmware performance results from employing a new type of indirection table. Intel switched from utilizing a compressed binary tree system to a fully uncompressed 1:1 mapping of the NAND flash. This eliminates the need for defragmentation of the mapping table and reduces associated I/O latency concerns. In order to access such a large indirection table quickly, Intel keeps this 'map' located in the 1GB of ECC DDR3-1333 DRAM (on the 800GB model). The large tables necessitate more cache for the SSD, with varying capacities of DRAM on each model.
The 6Gb/s controller provides sequential read and write speeds of 500/365 MB/s, respectively, for the 200GB model. The 200GB SSD also features 75,000 random read IOPS and 32,000 random write IOPS. Write performance scales with various capacity points and the larger models provide more performance.
HET-MLC is a key component in the architecture, delivering 10 DWPD (Drive Writes Per Day) of endurance for five years. This doubling of endurance from the previous generation SSD equates to 14.6 Petabytes of endurance for the 800GB model and 7.3PB at the 400GB capacity point. This endurance, and a 2 million hour MTBF, is backed up by the Intel five year warranty.
The SSD comes in both 1.8" and 2.5" 7mm form factors, with the 1.8" devices intended for high-density blade and micro-server applications. Power consumption is slated at up to 6W (typ) and an idle of 650mW. The 2.5" SSDs can pull power from either 5V and 12V rails, or both simultaneously. The 1.8-inch model only utilizes the 3.3V rail.
Enhanced power protection comes in the form of two radial electrolytic capacitors (rated for 105C at 3.5V/47uF). These capacitors flush data in-transit to the NAND in the event of a host power-loss issue. The SSD features self-diagnostics of the capacitor, and upon failure of the capacitor will automatically switch the SSD into write-through mode. Users can also monitor the capacitor via SMART data.
Intel has taken several steps to protect user data, with CRC (Cyclic Redundancy Checks), firmware and logical block address verification built into the firmware. CRC consists of a hash tag used to validate data and identify data corruption. This protects the data from its original issuance, through the various levels of internal cache (SRAM and DRAM), and down to the NAND. AES-256 bit encryption support rounds out the feature set.
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- Page 1 [Introduction]
- Page 2 [Intel DCS3700 Architecture]
- Page 3 [Adaptec ASR-72405]
- Page 4 [Test System and Methodology]
- Page 5 [RAID 0 4K Random Read/Write]
- Page 6 [RAID 0 8K Random Read/Write]
- Page 7 [RAID 0 128K Sequential Read/Write]
- Page 8 [RAID 0 Database/OLTP and Webserver]
- Page 9 [RAID 5 4K Random Read/Write]
- Page 10 [RAID 5 8K Random Read/Write]
- Page 11 [RAID 5 128K Sequential Read/Write]
- Page 12 [RAID 5 Database/OLTP and Webserver]
- Page 13 [Final Thoughts]
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