History of the Intel Xeon Processor

Intel has always had its hand in both the server and desktop markets. The emergence of the Intel Pentium Pro CPU marked the entry of Intel into the high-end server platform. The Pentium Pro was the first CPU to incorporate the P6 bus architecture, which later on formed the basis of the Pentium II and Pentium III CPU line. However, back when the Pentium and Pentium MMX were around, Pentium Pro exhibited extreme amounts of power. Firstly designed with the Level 2 cache directly on the die, Intel managed to create the Pentium Pro for low, mid and high-end servers. Depending on your requirements, you could get the Pentium Pro with 256K, 512K or 1MB of L2 cache. Back then it was extremely hard to get the cache on the CPU die, and prices were extremely expensive.

When the Intel Pentium II processor made its debut, it took the form of the Pentium Pro CPU with a higher FSB, but with the cache moved to a card module, adding MMX to the CPU gave it a better desktop and server profile, as Dual Pentium II systems were not uncommon. This left Intel’s Pentium Pro displaced in the server market, Intel needed a new server chip to stay ahead of the desktop, after all its better to charge extra for a server CPU that companies like Dell, Sun and the rest can all afford and so this began the Xeon reign. Named the Pentium II Xeon, the cache size was increased from 512K up to 1MB or 2MB of on card Level 2 cache. The CPU also changed its form from Slot 1 to Slot 2 which was simply so you couldn’t use Pentium II processors on a Pentium II Xeon board and vice versa.

Pentium III made its mark coming out with its SSE instruction set, which proved to benefit the server market more than the desktop. In fact, Intel released the Pentium III Xeon CPU based directly on the same Pentium III core, the L2 cache once again was either 1MB or 2MB. Using the same FSB and Slot 2, you could simply update your PII Xeon boards to take Pentium III Xeons.

Pentium 4 release saw Intel take a new approach to the server market. Rather than keep the Pentium 4 name, Intel wanted to totally move the server name away from the Desktop CPU, though designed directly on the same architecture. The Intel Xeon, the first of the Xeon brand used the Netburst Architecture and came out in a Socket 604. This new socket was to add extra power for the additional cache for the CPU, as well as keep the Intel Pentium 4 from being used in Xeon boards.

The Gallatin core Xeon was the first real upgrade to the Xeon line, Gallatin added a whopping 2MB, 3MB or 4MB of Level 3 cache - that’s right, the first CPU to actually do this was AMD with the K6-3. Intel used the same core, upgraded the bus speed to 533FSB, added support for Hyper-Threading and the extra cache. Gallatin cores with 2MB L3 cache eventually made their way into the desktop market in the Socket 478 and 775 as the Pentium 4 Extreme Edition.

Now with Intel’s latest Prescott technology, the time has come again to upgrade the CPU. The Noccona CPU uses the Prescott 0.09um process which adds SSE3 support and 1MB of L2 cache rather than the old 512K L2 cache on the Pentium 4 based Xeons, however, the Noccona lacks any L3 cache at this time. Hyper-Threading still makes its appearance along with Intel’s EMT64 technology.

EM64T or Extended Memory 64 Technology is Intel’s own brand of the x86-64 architecture. For quite some time, Intel has been saying that IA-64 was to be the only way they would go for 64bit, which of course was the Itanium and Itanium2’s bus architecture, however, due to lack of take up as well as AMD’s development of the Athlon 64 using the x86-64 architecture, it became apparent that if you can’t beat’ em, just join’ em.

EM64T adds support for memory addressing above 4GB, as well as support for 64bit applications that previously only the Athlon 64 has been able to run, this includes the pre-release of Windows XP 64bit Edition.

Now we have covered the basics, let’s take a look at both the Xeon CPU’s as well as our first EMT64 Noccona review motherboard from ASUS, the NCL-DS.







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