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NVIDIA's Tegra K1 processor is quite the performance powerhouse, with a quad-core processor with four A15 CPUs, up to 2.3GHz clock speed, and a 192 Kepler-based GPU cores for the graphics side of things. We've seen the Tegra K1 power NVIDIA's cheap, but very powerful Shield Tablet, but the company is already showing off the next version of its SoC.
At HOT CHIPS, a technical conference in the world of high-performance chips, NVIDIA has unveiled more details on the 64-bit version of its Tegra K1 processor. The 64-bit Tegra K1 is powered by the 192-core Kepler GPU, with NVIDIA's own custom-designed 64-bit, dual-core "Project Denver" CPU, which is fully ARMv8 architecture compatible. The big shift here is that the Denver part of the Tegra K1 is a dual-core variant, with a clock speed of up to 2.5GHz, but is 64-bit capable. The current Tegra K1 is a quad-core chip, with 32-bit capabilities. This makes the 64-bit Tegra K1 the world's first 64-bit ARM processor for Android, demolishing the competition when it comes to performance.
NVIDIA has used some clever optimizations, as well as its advanced technology in its Denver CPU cores, to deliver performance from its dual-core Denver-based Tegra K1 that rivals even four or eight-core CPUs that we find in our mobile devices today. Better yet, The 64-bit Tegra K1 processor offers PC-class performance, extended battery life, better gaming and multi-tasking, and much more. NVIDIA will see its 64-bit Denver-based Tegra K1 processor baked into mobile devices later this year, with the company also teasing that it is already working on support for the upcoming release of Android L on its 64-bit Tegra K1.
Researchers at IBM are working on a new chip that is designed to mimic a human brain. The chip has 4096 cores and according to IBM, it is able to simulate millions of neurons. The chip was fabricated by Samsung and is known as SyNAPSE. Samsung used 28nm process to build the chip and it features 5.4 billion CMOS transistor gates.
Total power consumption for the chip is 70mW and IBM says that the processor architecture is compatible with today's CPUs. The development of this processor was funded by DARPA with $53 million being contributed to the team for development.
IBM designed the chip with 16 TrueNorth chips on one circuit board allowing the chip to mimic sixteen million programmable neurons and four billion programmable synapses. Development of the chip continues with IBM working to improve density and power aiming at 20mW per cm2.
Intel is facing troubles with its schedule of 14nm manufacturing process, however the chipmaker said that this won't affect 10nm fabrication's schedule. Intel may be under the pressure to reassure its investors as its postponed its 14nm processor production plans that was supposed to roll out from its Fab 42 plant in Arizona, USA. 10nm is scheduled for mass-production for 2016.
Intel's CEO Brian Krzanich said during its quarterly conference call with financial analysts and investors,"We have done no changes or shift to our 10nm schedule, but we will not really talk about 10nm schedules until next year". However, Intel didn't reveal details about the production of these chips.
This might be the reason why Intel may show-off its first 10nm wafer during the upcoming Intel Developer Forum 2014. The demonstration of these wafers should reinvigorate investor's faith in Intel's schedule and in its tick-tock strategy, despite 14nm delays. It is also rumoured that Taiwan-based semi-conductor maker TSMC is also making plans to fabricate 10nm chips, which may also pressure Intel to go ahead of schedule with its 10nm roadmap.
It looks like things could get quite good at the Intel Developer Forum (IDF) in September, according to DigiTimes' sources. These sources have said that Intel will show off its 14nm processors in September, but it will also be teasing its 10nm wafers at the event, too.
DigiTimes' sources said: "Intel will release its 14nm Core M-series processors in the fourth quarter and 14nm Broadwell-based processors in January 2015". Intel is expected weaker-than-expected yields, and has a lot of 22nm-based processors in its inventory, and mixed with poor PC demand right now, Intel has reportedly "postponed 14nm processor production, which is planned to be conducted at its Fab 42 in Arizona, the US", according to these sources.
According to these sources, we should expect TSMC to pump up the mass production of its 20nm process in Q3 2014, where it will announce its 16nm FinFET process in 2015, followed by a 10nm process that will enter mass production in 2016.
It seems that AMD is working on a new APU using 28nm process and stacked DRAM, codenamed 'Carrizo'. It is said that these APUs will benefit from HBM (Higher Bandwidth Memory) implementation compared to current DIMM slot counterparts.
Though the reports are unconfirmed, it is known that AMD is collaborating with Hynix to make stacked DRAMs. The HBM provides higher bandwidth which will benefitted by the APU especially by the onboard graphics core. The APU will be made with 28nm process, but the onboard HBM die will be based on 20nm process. Its speculated that Carrizo's APU core die size is smaller than Kaveri.
HBM can provide maximum bandwidth of 128-256GB/s, which will prove to be a better implementation over DDR4 support. These APUs will most likely use the FM2+ socket and maintains 65w TDP envelope. If AMD incorporates on package DRAM solution, it will allow higher speeds for the memory and have lesser latency even compared to DDR4 implementation and it would cost lesser than integrating L3 cache. Whether the stacked DRAM be implemented in all of Carrizo APU lineups and feasibility especially for low-cost APUs is currently unknown.
Electronics maker Acer has introduced the first Chromebooks powered by the Intel Core i3 processor, with two different models available for release later this month. Acer currently controls almost 47 percent of the niche market, serving as one of the only companies to throw heavy time behind the lightweight, fast operating system.
The Acer C720 Chromebook will be available with two different models using the Intel Core i3-40005U processor (1.7 GHz, 3MB L3 cache). The Acer C720-3404 model will be priced for $379.99 with 4GB of memory, while the Acer C720-3871 will be priced at $349.99 with 2GB of memory. The supported resolution is 1366 x 768, featuring 32GB of storage, webcam, Wi-Fi, Bluetooth, USB 2.0 and 3.0, and an HDMI connector.
"This is an incredibly exciting time to be a leader in the Chromebook market, since customers are responding with tremendous enthusiasm for the product's performance, capabilities and value," said Eric Ackerson, Acer America Senior Product Marketing and Brand Manager, in a statement. "We've been breaking new ground with our Chromebooks since 2011, and our new Intel Core i3 model will deliver more of what our customers love about our Chromebooks, including excellent performance and all-day battery life."
IBM thinks that the days of silicon are numbered, as it spends $3 billion over the next five years on finding ways to create the future generations of microprocessors. Senior VP of IBM Systems & Technology Group, Tom Rosamilia, says: "We really do see the clock ticking on silicon".
Right now, IBM's very latest silicon components are baked onto a 22nm process, but the company is looking five years into the future where parts will become so small that it will be hard to maintain a reliable on and off state. Rosamilia adds: "As we get into the 7 nanometer timeframe, things really begin to taper off".
This has IBM looking at new ways of making components work, funding this new set of research. The company has faith in an alternative to silicon, something known as carbon nanotubes. The concept of this technology still needs considerable work if it hopes to see the fabrication of carbon nanotube-based processors as an alternative to silicon. Another route that IBM could go into is silicon nanophotonics, which uses light instead of electrical signals to blast data around the chip.
TSMC is reportedly increasing the development of its upcoming 10nm process so that it can better prepare itself against Samsung, which has reportedly received an order from Qualcomm to build 14nm FinFET chips, reports DigiTimes.
DigiTimes writes: "TSMC and Samsung are currently competing fiercely in the development of FinFET process, with the Korea-based foundry house utilizing a 14nm process and TSMC a 16nm node. Both the 14nm and 16nm processes are scheduled to enter volume production in early 2015". TSMC has been at the forefront of FinFET development, with plans to begin producing 16nm FinFET chips in Q4 2014.
DigiTimes' sources have said that TSMC has rescheduled its commercial production for the 16nm FinFET process, pushing forward with the more advanced 16nm FinFET Plus process. This process will consume less power, and shrink die sizes even more. TSMC is running scared at the moment, as it didn't anticipate Samsung to develop its 14nm process so quickly, so now the Taiwanese company is accelerating its development of the 10nm process, to continue staying out ahead of its competitors.
If new reports are to be believed, VIA is working on the next-generation version of its x86-based CPU architecture, Isaiah. The company's last try at the x86 CPU game was back in 2006, but the latest version looks like it'll be released in just a few weeks time.
German site 3DCenter is reporting on some of the performance comparisons with other low-power chips, such as AMD's Kabini APU which has a 25W TDP, and a mobile Bay Trail processor from Intel. Isaiah II looks like it can keep its own, but we don't know how genuine these benchmarks are, if they are genuine at all. Centaur is the name of VIA's CPU division, with its website teasing an upcoming refresh which will happen on September 1. This could be the date when we learn about the new CPU, so we'll be keeping our eyes open.
We can also confirm hearing stories from certain VIA employees at Computex that its next-gen CPU may end up being able to compete with Intel Core i5 level parts at low power consuming levels.
Intel has announced a new manufacturing agreement with Panasonic, which will see the chipmaker producing Panasonic's next-generation system-on-chips (SoCs) using a 14nm low-power manufacturing process.
The upcoming SoCs from Panasonic will be powering audio visual-based equipment markets such as TVs, Blu-ray players, media players and more. The next-generation chips will offer higher levels of performance and viewing experiences according to the company, with the 14nm process paving the way for very advanced chips with very low power requirements.
Yoshifumi Okamoto, the Director of Panasonic's SLSI Business Division said: "Intel's 14nm Tri-Gate process technology is very important to develop the next-generation SoCs. We will deliver highly improved performance and power advantages with next-generation SoCs by leveraging Intel's 14nm Tri-Gate process technology through our collaboration".