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IBM thinks that the days of silicon are numbered, as it spends $3 billion over the next five years on finding ways to create the future generations of microprocessors. Senior VP of IBM Systems & Technology Group, Tom Rosamilia, says: "We really do see the clock ticking on silicon".
Right now, IBM's very latest silicon components are baked onto a 22nm process, but the company is looking five years into the future where parts will become so small that it will be hard to maintain a reliable on and off state. Rosamilia adds: "As we get into the 7 nanometer timeframe, things really begin to taper off".
This has IBM looking at new ways of making components work, funding this new set of research. The company has faith in an alternative to silicon, something known as carbon nanotubes. The concept of this technology still needs considerable work if it hopes to see the fabrication of carbon nanotube-based processors as an alternative to silicon. Another route that IBM could go into is silicon nanophotonics, which uses light instead of electrical signals to blast data around the chip.
TSMC is reportedly increasing the development of its upcoming 10nm process so that it can better prepare itself against Samsung, which has reportedly received an order from Qualcomm to build 14nm FinFET chips, reports DigiTimes.
DigiTimes writes: "TSMC and Samsung are currently competing fiercely in the development of FinFET process, with the Korea-based foundry house utilizing a 14nm process and TSMC a 16nm node. Both the 14nm and 16nm processes are scheduled to enter volume production in early 2015". TSMC has been at the forefront of FinFET development, with plans to begin producing 16nm FinFET chips in Q4 2014.
DigiTimes' sources have said that TSMC has rescheduled its commercial production for the 16nm FinFET process, pushing forward with the more advanced 16nm FinFET Plus process. This process will consume less power, and shrink die sizes even more. TSMC is running scared at the moment, as it didn't anticipate Samsung to develop its 14nm process so quickly, so now the Taiwanese company is accelerating its development of the 10nm process, to continue staying out ahead of its competitors.
If new reports are to be believed, VIA is working on the next-generation version of its x86-based CPU architecture, Isaiah. The company's last try at the x86 CPU game was back in 2006, but the latest version looks like it'll be released in just a few weeks time.
German site 3DCenter is reporting on some of the performance comparisons with other low-power chips, such as AMD's Kabini APU which has a 25W TDP, and a mobile Bay Trail processor from Intel. Isaiah II looks like it can keep its own, but we don't know how genuine these benchmarks are, if they are genuine at all. Centaur is the name of VIA's CPU division, with its website teasing an upcoming refresh which will happen on September 1. This could be the date when we learn about the new CPU, so we'll be keeping our eyes open.
We can also confirm hearing stories from certain VIA employees at Computex that its next-gen CPU may end up being able to compete with Intel Core i5 level parts at low power consuming levels.
Intel has announced a new manufacturing agreement with Panasonic, which will see the chipmaker producing Panasonic's next-generation system-on-chips (SoCs) using a 14nm low-power manufacturing process.
The upcoming SoCs from Panasonic will be powering audio visual-based equipment markets such as TVs, Blu-ray players, media players and more. The next-generation chips will offer higher levels of performance and viewing experiences according to the company, with the 14nm process paving the way for very advanced chips with very low power requirements.
Yoshifumi Okamoto, the Director of Panasonic's SLSI Business Division said: "Intel's 14nm Tri-Gate process technology is very important to develop the next-generation SoCs. We will deliver highly improved performance and power advantages with next-generation SoCs by leveraging Intel's 14nm Tri-Gate process technology through our collaboration".
AMD launched its newest FM2+ socket based processor based on 28nm Kaveri architecture 'A10-7800' Accelerated Processing Unit (APU). The latest APU uses four Steamroller cores with TDP rated at 65W.
Unlike the A10-7700K and A10-7850K, this APU does not feature unlocked cores and therefore you cannot overclock it. The base clock speed is locked at 3.5GHz with TurboCore bumping it up to 3.9 GHz. The APU supports DDR3 memory up to 1866MHz frequency. On the graphic side, it features R7 series GPU core with 720MHz base clock and 512 GCN cores. This will support Mantle API and DirectX 11.2.
According to another report, A10-7800 APU is a part of the second release of AMD Kaveri APUs. A4-7300 and A6-7400K is also available for pre-order. A10-7800 is listed in US retail stores for $150, which sets itself against Core i3 Haswell processor lineups.
UPDATE - AMD contacted us with the following information. The price listed above is speculation only. AMD also positions the A10 against Intel Core i5 based processors (not i3) on comparable PCMark8 performance and significantly better 3DMark scores.
The Russian Industry and Trade Ministry has announced plans to replace the US-made processors from companies like Intel and AMD, with its own x86-based processors. These new processors will run on a new Linux-based system, with a CPU built-in Russia called Baikal.
Baikal is being made by an electronics division of T-Platforms, a supercomputer maker, and looks to have some serious funding being pumped into it. Rosnano, a technology firm, and Rostec, a rather large defense contractor, are both chipping into the project. The first processors off the production line will feature an ARM Cortex A-57 at 2GHz, and will run both PCs and servers.
Each and every year, the Russian government reportedly purchases 700,000 PCs which costs around $500 million. On top of this, the government spends a further $300 million acquiring 300,000 servers per year. The new Baikal processors should begin replacing the Intel- and AMD-powered machines starting in early 2015.
The reason behind the change? There are many. With the NSA PRISM and GCHQ stories out there, most would believe its for espionage reasons, but it will also be helping out local companies, instead of overseas interests. On top of that, it will allow the country to better protect its freedoms from the prying, all-seeing eye of the United States.
Intel is about to launch its 16-threaded (but 8-core) processor in September, and while that is for consumers, what is being played with behind closed doors in experiments is incredibly exciting - with a new 36-core processor teased by researchers at the International Symposium on Computer Architecture.
Li-Shiuan Peh, the Singapore Research Professor of Electrical Engineering and Computer Science at MIT, has said that the future of massively multi-core processors will be more like little Internets, where every core packs a router, with data travelling between cores in packets of fixed size. Peh's group unveiled a titanic 36-core processor that features this "network-on-chip" at the event.
Today's processors are connected by a single wire, and feature between 2 and 6 cores, with the multiple cores needing to talk to each other through exclusive access to the bus. But, this way won't work as the core count increases, as the other cores will be waiting for the bus to free up, rather than performing the duties you've set it out to do. With the network-on-chip, each and every CPU core is connected only to those that are directly next to it. Bhavya Daya, an MIT graduate student in electrical engineering and computer science explains: "You can reach your neighbors really quickly. You can also have multiple paths to your destination. So if you're going way across, rather than having one congested path, you could have multiple ones".
After watching season three of Game of Thrones, Intel's Knights Landing just reads and sounds like Kings Landing... but, onto the news. Intel has just announced its next-gen Xeon Phi chips, codenamed Knights Landing, at the International Supercomputing Conference being held in Leipzig, Germany.
The new processors will be capable of delivering close to three times the peak performance power of its predecessor, Knights Corner. The new Xeon Phi CPUs will use a new high-speed fabric technology - Intel's own Omni Scale fabric - that should help with performance, scalability, reliability, power and density requirements to speed up the rate of scientific discovery.
Intel's new Knights Landing processors will use 16GB of stacked memory, something that will be based on Micron's incredibly fast Hybrid Memory Cube technology. This technology is capable of 15x the bandwidth provided by DDR3, and 5x the bandwidth of DDR4, all while being 5x more power efficient, and only requiring 1/3 of the space.
Intel will reportedly launch its next-generation high-end desktop (HEDT) processors in mid-September, with the new Haswell-E chips arriving with the new X99 desktop platform too. We should see Intel officially launch its Core i7-5960X, the Core i7-5930K and the Core i7-5820K on the 14th of September.
On the same day, we should expect the chipmaker to launch its new X99 chipset, designed to power the new CPUs. One of the exciting new things about Haswell-E and X99 is that it supports DDR4 RAM, and that the top of the line Core i7-5960X is a 16-theaded CPU (8 cores, 8 HT threads = 16 threads total). The Core i7-5960X will arrive with a base clock of 3GHz, 20MB of L3 cache, support quad-channel DDR4 RAM up to 2133MHz, and will be an unlocked part for overclockers to have some fun with.
AMD has quite the claim for the future, where the chipmaker wants to see the power efficiency in mainstream processors increased by 25x, with a goal of 2020 to reach this point. The company wants to see laptops and other devices with "several days of battery life" according to AMD Researcher Sam Naffziger.
Naffziger says that larger gains for the world are capable with more power efficiency in its processors, noting that there are over 3 billion PCs in the world that consume 1% of the entire power output of the planet, with 20 million servers consuming another 1.5%. Naffziger also said that power management is improving so quickly that soon a CPU will be capable of shifting into low-power between user keystrokes, or between frames in a video.
This concept, is something called "race to idle" which turns off portions of the processor rapidly, or as quick as possible following a processor-intensive job. Mark Papermaster, AMD's Chief Technology Officer says that this is a big move away from the process-based improvements that we have been seeing until now, something that makes up the framework of Moore's Law. Papermaster says that power management and efficiency improvements are "going to have a big impact on the industry".
Papermaster continued: "Through APU architectural enhancements and intelligent power efficient￼ techniques, our customers can expect to see us dramatically improve the energy efficiency of our processors during the next several years. Setting a goal to improve the energy efficiency of our processors 25 times by 2020 is a measure of our commitment and confidence in our approach".