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Intel's P35 Chipset / DDR3 Launch

| CPU, APU & Chipsets News | Posted: May 22, 2007 12:05 am

Intel's much anticipated P35 mainstream desktop chipset (formerly codenamed "Bearlake") officially makes it into Intel's lineup today.

 

One of the biggest highlights about the introduction of this new chipset is that it will be the first to open the doors to DDR3 memory; Though some P35 boards will be designed to take DDR2 as well, making the upgrade step a little less-costly at first.

 

Aside from the much higher ceiling DDR3 memory is destined to bring us, the chipset itself carries support for a 1333MHz system bus, an obvious memory controller revamp which also introduces a new feature dubbed "Fast Memory Access", this basically optimizes the latency characteristics of the memory controller hub.

 

 

Last but not least, Intel have added a new southbridge to this family in the ICH9R. This southbridge brings support for 6 SATA ports (with Intel's Matrix Storage RAID technology and "Turbo Memory" support for Microsoft's Vista ReadyBoost feature), and an increase of USB ports to a total of 12.

 

An IGP based (G33) variant will also surface, essentially the same only with the inclusion of Intel's integrated Graphics Media Accelerator 3100 which sports "Clear Video" technology, this supposedly assisting with enhanced high-definition video processing tasks.

 

Co-inciding with the launch there is a bit of coverage surfacing around the web. You can check it all out below :-

 

- Hot Hardware
- PC Perspective #1
- PC Perspective #2
- Hexus
- Anandtech
- The Inquirer
- Tech Report
- Neoseeker
- bit-tech
- Hardtecs4u

 

Hot Hardware:-
Motherboard chipset technology isn't refreshed at the same fevered pitch that processors, memory or IO products are. A CPU or GPU speed-bump is like low-lying fruit relatively speaking, but chipset enhancements can usher in a whole host of stability, interoperability and verification challenges. Let's face it, when the product is the basis for a platform foundation, forward migrations can be painful if not carefully planned, so the upside benefits need to be worth-while for both the end customer as well as the manufacturer.

 

If you asked us a year ago, what Intel's path to a higher bandwidth system bus and memory access was, we might have told you serial links from the CPU to the Northbridge and serial FBDIMM technology on the system memory. Of course, that would have been almost completely misguided, since obviously Intel is still pushing hard on their now aging legacy front side bus architecture, with only a hint of a serially connected CPU architecture on the horizon. In addition, though serial FBDIMMs have taken hold in the server market, where high density memory configurations benefit from the technology's intrinsic signal integrity advantages under multi-drop loads; it won't be showing up in consumer desktop volumes any time soon.

 

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