Researchers from Rice University in Houston, Singapore's Nanyang Technological University (NTU), Switzerland's Center for Electronics and Microtechnology (CSEM) and the University of California, Berkeley have unveiled an "inexact" chip at the ACM International Conference on Computing Frontiers in Cagliari, Italy.
The chip is allowed to make mistakes in order to gain speed and energy usage advances. This new "inexact" processor is up to 15 times more efficient than current processors. It can be used in certain applications where 100% accuracy isn't mission critical. Examples of this would be video or picture processing.
"It is exciting to see this technology in a working chip that we can measure and validate for the first time," said project leader Krishna Palem, who also serves as director of the Rice-NTU Institute for Sustainable and Applied Infodynamics (ISAID). "Our work since 2003 showed that significant gains were possible, and I am delighted that these working chips have met and even exceeded our expectations."
"The paper received the highest peer-review evaluation of all the Computing Frontiers submissions this year," said Paolo Faraboschi, the program co-chair of the ACM Computing Frontiers conference and a distinguished technologist at Hewlett Packard Laboratories. "Research on approximate computation matches the forward-looking charter of Computing Frontiers well, and this work opens the door to interesting energy-efficiency opportunities of using inexact hardware together with traditional processing elements."
The idea behind how this all works is almost too simple. By allowing the hardware to make occasional errors, the power is able to be slashed to just a fraction of what normally is needed. Then, by cleverly limiting the probability of errors and which functions create them, researchers have found that they can boost performance while dropping energy consumption.
Additionally, the researchers found a use for "pruning" the chip, or in other words, getting rid of the chunks of rarely used processor. This would be those antiquated instruction sets that are still around from the 80s. The pruning also leads to improvements in processing speed and reductions in energy usage.
"In the latest tests, we showed that pruning could cut energy demands 3.5 times with chips that deviated from the correct value by an average of 0.25 percent," said study co-author Avinash Lingamneni, a Rice graduate student. "When we factored in size and speed gains, these chips were 7.5 times more efficient than regular chips. Chips that got wrong answers with a larger deviation of about 8 percent were up to 15 times more efficient."
Project co-investigator Christian Enz, who leads the CSEM arm of the collaboration, said, "Particular types of applications can tolerate quite a bit of error. For example, the human eye has a built-in mechanism for error correction. We used inexact adders to process images and found that relative errors up to 0.54 percent were almost indiscernible, and relative errors as high as 7.5 percent still produced discernible images."
As you can see in the image above, it is three repeats of the same image for comparison. The one on the left was produced with a traditional microprocessor. The one in the middle was produced using one of the 7.5x efficient processors with a 0.54% error and the one on the right was created using a processor with a relative error of 7.58%. The processor that created the right image is nearly 15 times more efficient than that of the left picture.