A little birdy has learned today that Intel is apparently looking to have a new PCI Express interface implemented into future chipsets. And no, it's not to do with PCI-E 3.0 which is already a definitive inclusion on the cards.
What the company is looking squarely at is an interface PCI-SIG doesn't currently have a slot or port specification for - that being PCI-Express 2.0 x2. Why x2? Intel's basis of reasoning for it is to provide a more balanced and cost effective means for third parties manufacturing devices such as 2-port SATA 6Gbps and USB 3.0 controller chips, without bottlenecking their performance.
While most of these types of devices currently maintain their tiny package size thanks to using a single lane (x1) PCI-E connection, the devices tend to heavily saturate it and bottlenecks are often seen. Shifting said device to a x4 slot on the other hand is simply overkill, while retracting from the already limited lanes available in total on current desktop chipsets.
So, Intel is all for bringing on a happy medium it seems, with a x2 slot being a sweet spot with 2GB/s of bandwidth (1GB per direction). This will help decrease R&D overheads for add-in device manufacturers by not having to significantly increase chip pin-counts to make use of PCI-E x2, as opposed to x4 being the next step up from x1 currently.