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MIT Researchers looking for ways to shrink Chips

Possibly down to 2nm

| Posted: Apr 14, 2009 3:21 pm

Scientists at MIT may have discovered a way to make the interconnects and transistors found in semi-conductors smaller than those used in today's manufacturing.


The method uses focused light beams to etch the lines into the silicon. Current technology uses focused electrons. Once the technique is ready it could enable lines as small as 2-3nm. However as of this writing the lines are actually wider than Intel's latest at 36nm (Intel is beginning to use a 32nm process.


Read more at Computer World.


MIT Researchers looking for ways to shrink Chips
Chip manufacturers such as Intel Corp. and Advanced Micro Devices Inc. typically imprint semiconductor designs on a glass material called a photomask, which is then used to transfer the pattern onto silicon wafers.


"What Intel does is pattern replication," Menon said, noting that the current approaches used by Intel and other companies involve the use of electron beams. MIT's new technique involves direct pattern creation via light sources, which can be more accurate and provides increased flexibility for quickly changing designs, the researchers claim.


"If you do patterning with electron beams, you will always have to worry about accuracy," Menon said. "Your patterns could get slightly distorted, which could have a big impact on device performance. Photons will go where you tell them to go, whereas electrons won't at the nanoscale."


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