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10 terabytes could soon fit on a quarter

nano-technology may have the answer

| Posted: Feb 20, 2009 7:55 pm

If researchers can overcome a few annoying issues we may soon be looking at 10 terabyte drives that are no bigger than a US quarter.

 

The break though in size reduction comes from nano-technology research that in to self-assembled data structures. Using a crystalline structure like sapphire or silicon they would first cut the disk at an angle to expose the lattice structure. This disk would be further heated to allow the exposed lattice to re-form into saw-tooth like ridges (about 30k of these ridges would cover the diameter of a human hair). From there a polymer would be layered onto the disks. This layer would form into a hexagonal screen. Using this screen like a template nickel would be vaporized onto the disk and screen removed, this would create a perfect data matrix at an incredibly small size.

 

The problems they face; making a head small enough to float over the data spots, along with a magnet that can read from and write to such a minute area.

 

Researchers say there are many problems to be overcome. But all of them are solvable.

 

Read more here at Forbes.

 

10 terabytes could soon fit on a quarter

The secret to packing that much information on such small real estate--about 15 times denser than the densest data storage device currently in existence--is self-assembly, or tricking the disk's materials into organizing into an array of data-storing dots packed far tighter than what could be accomplished with current techniques.

 

The researchers report their work in the Feb. 20 issue of Science magazine.

 

Nanotechnology techniques such as self-assembling promise researchers an intriguing alternative to continuing to refine the most commonly used technique for building transistors on silicon computer chips, namely, optical lithography. Optical lithography techniques become increasingly problematic as engineers build tinier devices--the wavelength of the light used to cast patterns onto silicon is already bigger than the width of the devices engineers want to create.

 

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