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Intel Skylake Microarchitecture - High Level Info from IDF 2015

By: Steven Bassiri | Intel CPUs in CPUs, Chipsets & SoCs | Posted: Aug 24, 2015 1:15 pm

Overclocking and Other Improvements

 

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Intel's engineers spent a good amount of time optimizing the overclocking of the platform. One of the biggest improvements over its predecessors is the separation of the DMI/PCIe and BLCK for the cores. No longer are BLCK dividers required for CPU overclocking, now an external clock generator (or internal depending on the motherboard) provides fine granularity BLCK to each of the CPUs internal domains except the DMI and PCIe.

 

This means that I/O won't run at increased speeds which can cause issues, and instead it will constantly run at normal speeds while the CPU cores, memory, and graphics are overclocked. Intel has increase memory dividers up to 41.33x in officially supported code (up from 26.66x on X99), and memory frequency will work in steps of 100MHz and 133MHz, so 4000MHz is supported as is 4133MHz (100Mhz and 133MHz).

 

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Intel's Z170 chipset has also been heavily improved. There is now on-die power metering and throttling as well as power gating. Both PCI-E and DMI are now working at Gen3 levels (8Gb/s). There are 26 I/O ports for SATA/PCIe/USB3. More I/Os have been added in many SKUs for support of things like cameras. Intel has also improved the DSP (digital signal processor) for audio.

 

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Some Skylake SoCs will come with an image signal processor which will eliminate the need for an off-die implementation in mobile devices. It has support for up to 13MP.

 

We hope you've enjoyed this detailed look into Intel Skylake from what we learned about it last week at IDF. Stay tuned for more later on.

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