TwinMOS Twister DDR-500
Double Data Rate architecture
Bi-directional data strobe (DQS)
Different clock inputs (CK and /CK)
MRS cycle with address key programs
* CAS latency: CL2.5
* Burst length: 2, 4, 8
* Burst type: Sequential & Interleave
2 variations of refresh
*Auto refresh & Self refresh
Edge aligned data output, center aligned data input
2 banks to be operated simultaneously or independently
Serial Presence Detect with EEPROM
Package: TSOP, WLCSP
- The Modules
While we did have a look at this memory earlier in an individual review, it is still nice to go over the modules in questions within our roundup here today. The Twister modules are TwinMOS's high-end modules designed for 466MHz + on the DDR bus. Designed with new packaging technologies, TwinMOS is hoping its Twister line can bring home the bickies.
TwinMOS has used a smaller than average PCB. In fact, it is almost as small as the Kingmax Tiny-BGA PCB. This does make the heatsink rather large and as stated before in our previous article, does make installation into the DIMM sockets rather hard. On the front, TwinMOS places a 2.8v sticker on the front to show the maximum supported voltage that the Twister 500 is able to sustain without doing your warranty any harm; however, it works perfectly up to 3.0v as we found out.
TwinMOS is the first to start production of the memory module chips on the WLCSP package. This package is designed to reduce space and heat generation. While these modules do share the same packing design as TSOP-II, they are directly mounted to the PCB without the ceramic packaging, leaving no trace wires. To keep the modules cool, TwinMOS uses an alloy heatsink with pinch clips similar to the OCZ design heatsink.
In our first attempts, these modules performed quite poorly in overclocking, even with the latest BIOS and most flexible motherboard available, the TwinMOS memory would not go any faster than 254MHz even at 2.8v - it simply hates any settings above 254MHz no matter what.
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