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Intel Core i7 Memory Analysis - Can Dual Channel Cut it? - Behind the Core i7

Taking a break from X58 boards, we have a look at dual vs triple channel memory configurations on the Core i7 platform.

| Editorials in RAM | Posted: Nov 24, 2008 5:00 am

Core i7 and Memory Controller Details

 

Intel Core i7 Memory Analysis - Can Dual Channel Cut it?

 

For those who missed our review of the Core i7 processors, we have a brief re-cap of the major changes that the Core i7 has over the Core 2 series CPU.

 

Ever since the introduction of the PC, the system memory has been located on a separate bus. This bus has been connected to the system using a dedicated chipset called a Northbridge. This chipset really was the heat of the system as it connected the CPU to the memory and to the other integrated and discrete components through different buses that the system had. Many of these buses included ISA, PCI, AGP and now PCIe.

 

Back in 2003 AMD revolutionised the way the CPU and memory communicated. AMD's K8 processor integrated its DDR memory controller onto the CPU itself. The Socket 754 integrated a single channel DDR memory controller supporting up to 400MHz memory for a grand total of 3.2GB/s of bandwidth. The impressive part of this was that the CPU was able to use up to 3GB/s of the total 3.2GB/s and only 200MB/s was wasted on overheads.

 

While impressive, it wasn't able to keep up with Intel using Dual Channel DDR memory, so Socket 939 popped up supporting an extra DDR memory channel, allowing for a grand total of 6.4GB/s memory bandwidth. When tested, 6.12GB/s was available with only a little wasted on overheads and the rest of the system. AM2 popped up later on supporting DDR2 memory on a dual channel basis, giving up to 8.5GB/s total with around 7 to 7.5GB/s available depending on the speed and latency of the DDR2 modules.

 

Intel's Core i7 is the first generation CPU from Intel to have an integrated Northbridge on the CPU, which is known as the UNCORE. This is connected to the CPU through the request queue; this is the same bus/interface that all four cores use to communicate with each other as well as the level 3 cache. Rather than a single channel first generation such as AMD's first instance, Intel has gone all out. Three separate 64-bit memory channels have been set on the UNCORE for a grand total of a 192-bit memory interface. Further to this, Intel has abandoned DDR2 with Core i7 and goes with DDR3 memory rated for 1066MHz initially. With three channels of memory using this spec we get a total of 25GB/s memory bandwidth. This is shared amongst all of the cores along with the system and so far we have seen that up to 24GB/s can be claimed in tests.

 

This is a huge amount of data that can be transferred between the CPU and the memory controller. However, does the system really need all this extra bandwidth? Can the system survive on two channels of DDR3 memory, leaving the system with 17GB/s to use?

 

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